{ "description": "Browse aymeric's, an independent, searchable archive of readable snapshots from followed feeds, preserved in Git with aggr.", "feed_url": "https://aggr.aymericbeaumet.com/sources/erici.eu/feed.json", "home_page_url": "https://aggr.aymericbeaumet.com/sources/erici.eu/", "items": [ { "authors": [ { "name": "ymz5" } ], "content_html": "

European RISC-V Industrial Computing Initiative

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RISC-V Industrial Computers.
\nOpen, partitioned, built to last.

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RVA23 silicon has arrived. The industrial computer built on it has not. ERICI coordinates a reference stack, from firmware to real-time and general-purpose operating systems: it fixes the interfaces between the layers and verifies that they boot together on real RVA23 hardware. A box that boots it is ERICI-compatible.

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Linux operator GUI, HMI

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QSOE real-time control

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gRouvr partitioning hypervisor

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mr-bml boot loader, OS selection

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HFI BIOS firmware, Set-Up, boot control

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RVA23 RISC-V SoC cores, memory, devices, IOMMU

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The ERICI reference stack, tested together layer by layer. See how it boots

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Why now

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Industrial computing is ready for RISC-V

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Today's industrial computers run on x86 and Arm: two instruction sets, each owned and licensed by a single company. RISC-V is open, governed by a non-profit, and implemented by many vendors. Until recently it lacked what industrial systems need. That has changed.

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1

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An open ISA

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No license for the instruction set, no single owner, no single country. A machine expected to run for 15 years should not depend on one company's roadmap, or one government's decisions.

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2

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RVA23: a real baseline

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The RVA23 profile, ratified in October 2024, makes the hypervisor and vector extensions mandatory. Software can rely on them on every compliant chip.

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3

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Silicon is shipping

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The first RVA23 SoCs and boards are available in 2026, with eight 64-bit cores and an IOMMU. Developers can buy them today.

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4

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One box instead of two

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A partitioning hypervisor runs real-time control and the operator's Linux side by side, isolated from each other, on one SoC.

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From a university project to industrial computing

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    \n
  1. 2010 RISC-V starts at UC Berkeley
    2. \n
  2. 2015 RISC-V Foundation founded
    3. \n
  3. 2020 RISC-V International, based in Switzerland
    4. \n
  4. 2021 Hypervisor and vector extensions ratified
    5. \n
  5. 2024 RVA23 profile ratified
    6. \n
  6. 2026 First RVA23 boards. ERICI starts.
    7. \n
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So why are there no RISC-V industrial computers yet? Board makers wait for software, software waits for boards, and customers wait for both. ERICI breaks that loop with an open reference stack running on real hardware.

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The gap

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The silicon is here. The industrial computer isn't yet.

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The first RVA23 machines are on the market: eight 64-bit RISC-V cores, the hypervisor extension, an IOMMU. They are excellent development and edge platforms. An industrial computer has to do more: survive the control cabinet, talk to the field, and stay available for a decade or longer.

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\"Firefly

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Firefly AIBOX-K3

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T-Chip Intelligent Technology · edge mini PC

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Image © T-Chip Intelligent Technology Co., Ltd. · product page

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\"Milk-V

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Milk-V Jupiter2

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Milk-V · single-board computer, metal case

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Image © Milk-V · product page

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What a RISC-V Industrial Computer needs

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RequirementAIBOX-K3Jupiter2
YesYes
9–20 V12 V / USB-PD
−20 to 60 °CNot stated
Not statedVia modules
Not statedNot stated
Not statedNot stated
Not statedNot stated
Not statedNot stated
Not yetNot yet
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Partitioned stack: demonstrated on the SpacemiT K3 PicoITX board, not yet on these products. See the video.
\nSpecifications as published by the manufacturers, October 2026. Both products are shown as examples of RVA23 hardware available today. No affiliation with ERICI or endorsement by the manufacturers is implied.

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The missing pieces are not the cores. They are the industrial hardware around them and an open, partitioned software stack on top. That is where ERICI starts.

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Reference stack

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Defined together, verified together

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A RISC-V Industrial Computer is built in layers. ERICI defines a reference stack, documents the interface between each pair of layers, and verifies the whole stack on real RVA23 hardware. The reference components are developed by QSOE Systems; Linux by its community. Each layer depends only on what the layer below hands over.

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Operator partition GUI, HMI, networking

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Linux a general-purpose OS for everything that is not time-critical

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Real-time partition control loops, machine I/O

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QSOE a QNX-style environment: /N on its own Skimmer microkernel, /L on seL4, same userspace

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Partitioning CPUs, memory, devices, IOMMU

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gRouvr RVA23 resource-partitioning hypervisor; every available means of isolation, IOMMU included

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Loading boot menu, OS images

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mr-bml menu-driven boot loader: the operator selects which systems to start

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Firmware initialization, boot control

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HFI BIOS U-Boot-based, with POST and a BIOS-style Set-Up for industrial boards

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Hardware RVA23 SoC with IOMMU

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SpacemiT K3 8× X100 cores, hypervisor extension, IOMMU

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How it boots

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The firmware initializes the system, runs POST and offers its Set-Up. Then it starts a UEFI boot loader, and its job is done. The loader starts operating systems, or a hypervisor together with them.

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gRouvr is loaded just like a Linux kernel with its initrd. Its boot package is a CPIO archive that holds the kernel and initramfs image of every partition. So mr-bml loads it, and so does GRUB. gRouvr then gives each partition its own CPUs, memory and devices, and a devicetree that describes them. Real-time and Linux partitions start side by side.

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\"QSOE/N

▶ Watch the demonstration gRouvr booting Linux and QSOE/N on the SpacemiT K3. Opens on YouTube.
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Built to outlast

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Not tied to one chip

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The first RVA23 SoCs come from Chinese vendors; more will follow from other vendors and other regions. The reference stack depends on the RVA23 profile and on open interfaces, not on a particular SoC. Moving a box to another RVA23 chip means porting the firmware, adapting the hypervisor and the board's drivers. The real-time application and the operator's Linux move with it.

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Not tied to one developer

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The reference stack is open source: HFI BIOS under GPL-2.0, like the U-Boot it is based on; mr-bml under GPL-3.0; gRouvr and QSOE under Apache 2.0. Anyone can build, audit and maintain it, with or without its original developers. A machine that runs for 15 years needs software that can be maintained for 15 years.

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Join

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Build the RISC-V industrial computer with us

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ERICI is in its founding phase. Companies and institutions that see RVA23 as the future of industrial computing are welcome to join now and shape the initiative from the start.

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Who we invite, and what they bring

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How ERICI works

\n\n", "date_modified": "2026-11-02T08:58:33+00:00", "date_published": "2026-11-02T08:58:33+00:00", "external_url": "https://erici.eu/", "id": "urn:aggr:item:b247435dd555e253fc42fdd327eeb9a0135e4c17", "image": "https://erici.eu/img/og-card.png", "summary": "European RISC-V Industrial Computing Initiative RISC-V Industrial Computers. Open, partitioned, built to last. RVA23 silicon has arrived. The industrial computer built on it has not. ERICI coordinates a reference stack, from firmware to…", "tags": [ "news" ], "title": "European RISC-V Industrial Computing Initiative", "url": "https://aggr.aymericbeaumet.com/items/hnrss-org/2026-11-02-european-risc-v-industrial-computing-initiative/" } ], "language": "en", "title": "erici.eu", "version": "https://jsonfeed.org/version/1.1" }