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  "articleBody": "European RISC-V Industrial Computing Initiative\n\nRISC-V Industrial Computers.\\\n Open, partitioned, built to last.\n---\n\nRVA23 silicon has arrived. The industrial computer built on it has not. ERICI coordinates a reference stack, from firmware to real-time and general-purpose operating systems: it fixes the interfaces between the layers and verifies that they boot together on real RVA23 hardware. A box that boots it is ERICI-compatible.\n\n- Non-commercial\n- RVA23\n- Based in Europe, open worldwide\n\n**Linux** operator GUI, HMI\n\n**QSOE** real-time control\n\n**gRouvr** partitioning hypervisor\n\n**mr-bml** boot loader, OS selection\n\n**HFI BIOS** firmware, Set-Up, boot control\n\n**RVA23 RISC-V SoC** cores, memory, devices, IOMMU\n\nThe ERICI reference stack, tested together layer by layer. [See how it boots](https://erici.eu/#stack)\n\nWhy now\n\n## Industrial computing is ready for RISC-V\n\nToday's industrial computers run on x86 and Arm: two instruction sets, each owned and licensed by a single company. RISC-V is open, governed by a non-profit, and implemented by many vendors. Until recently it lacked what industrial systems need. That has changed.\n\n1\n\n### An open ISA\n\nNo license for the instruction set, no single owner, no single country. A machine expected to run for 15 years should not depend on one company's roadmap, or one government's decisions.\n\n2\n\n### RVA23: a real baseline\n\nThe RVA23 profile, ratified in October 2024, makes the hypervisor and vector extensions mandatory. Software can rely on them on every compliant chip.\n\n3\n\n### Silicon is shipping\n\nThe first RVA23 SoCs and boards are available in 2026, with eight 64-bit cores and an IOMMU. Developers can buy them today.\n\n4\n\n### One box instead of two\n\nA partitioning hypervisor runs real-time control and the operator's Linux side by side, isolated from each other, on one SoC.\n\n### From a university project to industrial computing\n\n1. **2010** RISC-V starts at UC Berkeley\n2. **2015** RISC-V Foundation founded\n3. **2020** RISC-V International, based in Switzerland\n4. **2021** Hypervisor and vector extensions ratified\n5. **2024** RVA23 profile ratified\n6. **2026** First RVA23 boards. ERICI starts.\n\nSo why are there no RISC-V industrial computers yet? Board makers wait for software, software waits for boards, and customers wait for both. ERICI breaks that loop with an open reference stack running on real hardware.\n\nThe gap\n\n## The silicon is here. The industrial computer isn't yet.\n\nThe first RVA23 machines are on the market: eight 64-bit RISC-V cores, the hypervisor extension, an IOMMU. They are excellent development and edge platforms. An industrial computer has to do more: survive the control cabinet, talk to the field, and stay available for a decade or longer.\n\n![Firefly AIBOX-K3, a compact black and grey mini PC](https://erici.eu/img/01-FireFly_AIBOX_K3.png)\n\n### Firefly AIBOX-K3\n\nT-Chip Intelligent Technology · edge mini PC\n\n- SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23\n- Up to 32 GB LPDDR5, UFS, M.2 NVMe\n- 2× Gigabit Ethernet, 9–20 V DC input\n- −20 to 60 °C operating temperature\n\nImage © T-Chip Intelligent Technology Co., Ltd. · [product page](https://www.firefly.store/collections/ai-box/products/aibox-k3-risc-v-edge-mini-pc)\n\n![Milk-V Jupiter2 in its black metal case with two antennas](https://erici.eu/img/02-MilkV_Jupiter2.png)\n\n### Milk-V Jupiter2\n\nMilk-V · single-board computer, metal case\n\n- SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23\n- Up to 32 GB LPDDR5, UFS, M.2 NVMe\n- Gigabit and 10 GbE SFP+, Wi-Fi 6\n- Real-time I/O expansion for EtherCAT and CAN-FD modules\n\nImage © Milk-V · [product page](https://milkv.io/jupiter2)\n\n### What a RISC-V Industrial Computer needs\n\n| Requirement  | AIBOX-K3      | Jupiter2 |\n| ------------ | ------------- | -------- |\n| Yes          | Yes           |          |\n| 9–20 V       | 12 V / USB-PD |          |\n| −20 to 60 °C | Not stated    |          |\n| Not stated   | Via modules   |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not yet      | Not yet       |          |\n\nPartitioned stack: demonstrated on the SpacemiT K3 PicoITX board, not yet on these products. [See the video](https://erici.eu/#demo).\\\n Specifications as published by the manufacturers, October 2026. Both products are shown as examples of RVA23 hardware available today. No affiliation with ERICI or endorsement by the manufacturers is implied.\n\nThe missing pieces are not the cores. They are the industrial hardware around them and an open, partitioned software stack on top. That is where ERICI starts.\n\nReference stack\n\n## Defined together, verified together\n\nA RISC-V Industrial Computer is built in layers. ERICI defines a reference stack, documents the interface between each pair of layers, and verifies the whole stack on real RVA23 hardware. The reference components are developed by QSOE Systems; Linux by its community. Each layer depends only on what the layer below hands over.\n\n**Operator partition** GUI, HMI, networking\n\n**Linux** a general-purpose OS for everything that is not time-critical\n\n- devicetree\n- kernel + initrd\n\n**Real-time partition** control loops, machine I/O\n\n**[QSOE](https://qsoe.net)** a QNX-style environment: /N on its own Skimmer microkernel, /L on seL4, same userspace\n\n- devicetree\n- kernel + initrd\n- [Multiboot3](https://gitlab.com/qsoe/mr-bml) for /L, next gRouvr\n\n**Partitioning** CPUs, memory, devices, IOMMU\n\n**gRouvr** RVA23 resource-partitioning hypervisor; every available means of isolation, IOMMU included\n\n- kernel + initrd, like Linux\n\n**Loading** boot menu, OS images\n\n**[mr-bml](https://gitlab.com/qsoe/mr-bml)** menu-driven boot loader: the operator selects which systems to start\n\n- UEFI application\n\n**Firmware** initialization, boot control\n\n**[HFI BIOS](https://qsoe.net/hfi)** U-Boot-based, with POST and a BIOS-style Set-Up for industrial boards\n\n- RVA23 profile\n\n**Hardware** RVA23 SoC with IOMMU\n\n**SpacemiT K3** 8× X100 cores, hypervisor extension, IOMMU\n\n- the silicon itself\n\n### How it boots\n\nThe firmware initializes the system, runs POST and offers its Set-Up. Then it starts a UEFI boot loader, and its job is done. The loader starts operating systems, or a hypervisor together with them.\n\ngRouvr is loaded just like a Linux kernel with its initrd. Its boot package is a CPIO archive that holds the kernel and initramfs image of every partition. So mr-bml loads it, and so does GRUB. gRouvr then gives each partition its own CPUs, memory and devices, and a devicetree that describes them. Real-time and Linux partitions start side by side.\n\n[![QSOE/N login prompt on a monitor, running as a gRouvr guest on the SpacemiT K3](https://erici.eu/img/03-demo-grouvr-k3.jpg)](https://www.youtube.com/watch?v=i-NjXXnTv70) \\\n [▶ Watch the demonstration](https://www.youtube.com/watch?v=i-NjXXnTv70) gRouvr booting Linux and QSOE/N on the SpacemiT K3. Opens on YouTube.\n\n### Built to outlast\n\n### Not tied to one chip\n\nThe first RVA23 SoCs come from Chinese vendors; more will follow from other vendors and other regions. The reference stack depends on the RVA23 profile and on open interfaces, not on a particular SoC. Moving a box to another RVA23 chip means porting the firmware, adapting the hypervisor and the board's drivers. The real-time application and the operator's Linux move with it.\n\n### Not tied to one developer\n\nThe reference stack is open source: HFI BIOS under GPL-2.0, like the U-Boot it is based on; mr-bml under GPL-3.0; gRouvr and QSOE under Apache 2.0. Anyone can build, audit and maintain it, with or without its original developers. A machine that runs for 15 years needs software that can be maintained for 15 years.\n\nJoin\n\n## Build the RISC-V industrial computer with us\n\nERICI is in its founding phase. Companies and institutions that see RVA23 as the future of industrial computing are welcome to join now and shape the initiative from the start.\n\n### Who we invite, and what they bring\n\n- **Industrial hardware makers** the box itself: an RVA23 board in a real enclosure, with I/O and a datasheet\n- **Silicon vendors** RVA23 SoCs with an IOMMU and long-term availability\n- **Machine builders and plant operators** requirements from the field, and a first machine to put a box in\n- **OS and driver vendors** your RTOS, Linux distribution or drivers, brought up on a named RVA23 box\n- **Universities and research** teaching and theses on real ERICI systems\n\n### How ERICI works\n\n- **Non-commercial.** ERICI sells nothing and charges no membership fees.\n- **Open interfaces.** How each layer hands over to the next is public: UEFI, kernel + initrd, devicetree. Closed-source components are welcome, as long as they keep to these interfaces.\n- **Bring a real system.** Contributions are RISC-V industrial computers: a named SoC in a real box, with a datasheet and a date. Software counts when it serves such a system, such as the driver that lets the real-time partition on box X run its machine.\n- **Concrete, not abstract.** No road maps without silicon, no specs without a system that boots them.\n",
  "authors": [
    "ymz5"
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  "captured_at": "2026-11-03T14:36:14.641821525+00:00",
  "category": "news",
  "content_html": "<p>European RISC-V Industrial Computing Initiative</p>\n<h2>RISC-V Industrial Computers.<br />\nOpen, partitioned, built to last.</h2>\n<p>RVA23 silicon has arrived. The industrial computer built on it has not. ERICI coordinates a reference stack, from firmware to real-time and general-purpose operating systems: it fixes the interfaces between the layers and verifies that they boot together on real RVA23 hardware. A box that boots it is ERICI-compatible.</p>\n<ul>\n<li>Non-commercial</li>\n<li>RVA23</li>\n<li>Based in Europe, open worldwide</li>\n</ul>\n<p><strong>Linux</strong> operator GUI, HMI</p>\n<p><strong>QSOE</strong> real-time control</p>\n<p><strong>gRouvr</strong> partitioning hypervisor</p>\n<p><strong>mr-bml</strong> boot loader, OS selection</p>\n<p><strong>HFI BIOS</strong> firmware, Set-Up, boot control</p>\n<p><strong>RVA23 RISC-V SoC</strong> cores, memory, devices, IOMMU</p>\n<p>The ERICI reference stack, tested together layer by layer. <a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://erici.eu/#stack\">See how it boots</a></p>\n<p>Why now</p>\n<h2>Industrial computing is ready for RISC-V</h2>\n<p>Today's industrial computers run on x86 and Arm: two instruction sets, each owned and licensed by a single company. RISC-V is open, governed by a non-profit, and implemented by many vendors. Until recently it lacked what industrial systems need. That has changed.</p>\n<p>1</p>\n<h3>An open ISA</h3>\n<p>No license for the instruction set, no single owner, no single country. A machine expected to run for 15 years should not depend on one company's roadmap, or one government's decisions.</p>\n<p>2</p>\n<h3>RVA23: a real baseline</h3>\n<p>The RVA23 profile, ratified in October 2024, makes the hypervisor and vector extensions mandatory. Software can rely on them on every compliant chip.</p>\n<p>3</p>\n<h3>Silicon is shipping</h3>\n<p>The first RVA23 SoCs and boards are available in 2026, with eight 64-bit cores and an IOMMU. Developers can buy them today.</p>\n<p>4</p>\n<h3>One box instead of two</h3>\n<p>A partitioning hypervisor runs real-time control and the operator's Linux side by side, isolated from each other, on one SoC.</p>\n<h3>From a university project to industrial computing</h3>\n<ol>\n<li><strong>2010</strong> RISC-V starts at UC Berkeley</li>\n<li><strong>2015</strong> RISC-V Foundation founded</li>\n<li><strong>2020</strong> RISC-V International, based in Switzerland</li>\n<li><strong>2021</strong> Hypervisor and vector extensions ratified</li>\n<li><strong>2024</strong> RVA23 profile ratified</li>\n<li><strong>2026</strong> First RVA23 boards. ERICI starts.</li>\n</ol>\n<p>So why are there no RISC-V industrial computers yet? Board makers wait for software, software waits for boards, and customers wait for both. ERICI breaks that loop with an open reference stack running on real hardware.</p>\n<p>The gap</p>\n<h2>The silicon is here. The industrial computer isn't yet.</h2>\n<p>The first RVA23 machines are on the market: eight 64-bit RISC-V cores, the hypervisor extension, an IOMMU. They are excellent development and edge platforms. An industrial computer has to do more: survive the control cabinet, talk to the field, and stay available for a decade or longer.</p>\n<figure class=\"article-figure\"><picture class=\"article-picture article-picture-fallback\" style=\"--image-ratio:16 / 9\"><img src=\"https://erici.eu/img/01-FireFly_AIBOX_K3.png\" alt=\"Firefly AIBOX-K3, a compact black and grey mini PC\" loading=\"eager\" decoding=\"async\" fetchpriority=\"high\" referrerpolicy=\"no-referrer\" class=\"progressive-image\"></picture></p>\n<h3>Firefly AIBOX-K3</h3>\n<p>T-Chip Intelligent Technology · edge mini PC</p>\n<ul>\n<li>SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23</li>\n<li>Up to 32 GB LPDDR5, UFS, M.2 NVMe</li>\n<li>2× Gigabit Ethernet, 9–20 V DC input</li>\n<li>−20 to 60 °C operating temperature</li>\n</ul>\n<p>Image © T-Chip Intelligent Technology Co., Ltd. · <a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://www.firefly.store/collections/ai-box/products/aibox-k3-risc-v-edge-mini-pc\">product page</a></p>\n<p><picture class=\"article-picture article-picture-fallback\" style=\"--image-ratio:16 / 9\"><img src=\"https://erici.eu/img/02-MilkV_Jupiter2.png\" alt=\"Milk-V Jupiter2 in its black metal case with two antennas\" loading=\"lazy\" decoding=\"async\" fetchpriority=\"low\" referrerpolicy=\"no-referrer\" class=\"progressive-image\"></picture></p>\n<h3>Milk-V Jupiter2</h3>\n<p>Milk-V · single-board computer, metal case</p>\n<ul>\n<li>SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23</li>\n<li>Up to 32 GB LPDDR5, UFS, M.2 NVMe</li>\n<li>Gigabit and 10 GbE SFP+, Wi-Fi 6</li>\n<li>Real-time I/O expansion for EtherCAT and CAN-FD modules</li>\n</ul>\n<p>Image © Milk-V · <a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://milkv.io/jupiter2\">product page</a></p>\n<h3>What a RISC-V Industrial Computer needs</h3>\n<table>\n<thead>\n<tr>\n<th>Requirement</th>\n<th>AIBOX-K3</th>\n<th>Jupiter2</th>\n</tr>\n</thead>\n<tbody>\n<tr>\n<td>Yes</td>\n<td>Yes</td>\n<td></td>\n</tr>\n<tr>\n<td>9–20 V</td>\n<td>12 V / USB-PD</td>\n<td></td>\n</tr>\n<tr>\n<td>−20 to 60 °C</td>\n<td>Not stated</td>\n<td></td>\n</tr>\n<tr>\n<td>Not stated</td>\n<td>Via modules</td>\n<td></td>\n</tr>\n<tr>\n<td>Not stated</td>\n<td>Not stated</td>\n<td></td>\n</tr>\n<tr>\n<td>Not stated</td>\n<td>Not stated</td>\n<td></td>\n</tr>\n<tr>\n<td>Not stated</td>\n<td>Not stated</td>\n<td></td>\n</tr>\n<tr>\n<td>Not stated</td>\n<td>Not stated</td>\n<td></td>\n</tr>\n<tr>\n<td>Not yet</td>\n<td>Not yet</td>\n<td></td>\n</tr>\n</tbody>\n</table>\n<p>Partitioned stack: demonstrated on the SpacemiT K3 PicoITX board, not yet on these products. <a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://erici.eu/#demo\">See the video</a>.<br />\nSpecifications as published by the manufacturers, October 2026. Both products are shown as examples of RVA23 hardware available today. No affiliation with ERICI or endorsement by the manufacturers is implied.</p>\n<p>The missing pieces are not the cores. They are the industrial hardware around them and an open, partitioned software stack on top. That is where ERICI starts.</p>\n<p>Reference stack</p>\n<h2>Defined together, verified together</h2>\n<p>A RISC-V Industrial Computer is built in layers. ERICI defines a reference stack, documents the interface between each pair of layers, and verifies the whole stack on real RVA23 hardware. The reference components are developed by QSOE Systems; Linux by its community. Each layer depends only on what the layer below hands over.</p>\n<p><strong>Operator partition</strong> GUI, HMI, networking</p>\n<p><strong>Linux</strong> a general-purpose OS for everything that is not time-critical</p>\n<ul>\n<li>devicetree</li>\n<li>kernel + initrd</li>\n</ul>\n<p><strong>Real-time partition</strong> control loops, machine I/O</p>\n<p><strong><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://qsoe.net\">QSOE</a></strong> a QNX-style environment: /N on its own Skimmer microkernel, /L on seL4, same userspace</p>\n<ul>\n<li>devicetree</li>\n<li>kernel + initrd</li>\n<li><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://gitlab.com/qsoe/mr-bml\">Multiboot3</a> for /L, next gRouvr</li>\n</ul>\n<p><strong>Partitioning</strong> CPUs, memory, devices, IOMMU</p>\n<p><strong>gRouvr</strong> RVA23 resource-partitioning hypervisor; every available means of isolation, IOMMU included</p>\n<ul>\n<li>kernel + initrd, like Linux</li>\n</ul>\n<p><strong>Loading</strong> boot menu, OS images</p>\n<p><strong><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://gitlab.com/qsoe/mr-bml\">mr-bml</a></strong> menu-driven boot loader: the operator selects which systems to start</p>\n<ul>\n<li>UEFI application</li>\n</ul>\n<p><strong>Firmware</strong> initialization, boot control</p>\n<p><strong><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://qsoe.net/hfi\">HFI BIOS</a></strong> U-Boot-based, with POST and a BIOS-style Set-Up for industrial boards</p>\n<ul>\n<li>RVA23 profile</li>\n</ul>\n<p><strong>Hardware</strong> RVA23 SoC with IOMMU</p>\n<p><strong>SpacemiT K3</strong> 8× X100 cores, hypervisor extension, IOMMU</p>\n<ul>\n<li>the silicon itself</li>\n</ul>\n<h3>How it boots</h3>\n<p>The firmware initializes the system, runs POST and offers its Set-Up. Then it starts a UEFI boot loader, and its job is done. The loader starts operating systems, or a hypervisor together with them.</p>\n<p>gRouvr is loaded just like a Linux kernel with its initrd. Its boot package is a CPIO archive that holds the kernel and initramfs image of every partition. So mr-bml loads it, and so does GRUB. gRouvr then gives each partition its own CPUs, memory and devices, and a devicetree that describes them. Real-time and Linux partitions start side by side.</p>\n<p><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://www.youtube.com/watch?v=i-NjXXnTv70\"><picture class=\"article-picture article-picture-fallback\" style=\"--image-ratio:16 / 9\"><img src=\"https://erici.eu/img/03-demo-grouvr-k3.jpg\" alt=\"QSOE/N login prompt on a monitor, running as a gRouvr guest on the SpacemiT K3\" loading=\"lazy\" decoding=\"async\" fetchpriority=\"low\" referrerpolicy=\"no-referrer\" class=\"progressive-image\"></picture></a><figcaption><a target=\"_blank\" rel=\"noopener noreferrer\" href=\"https://www.youtube.com/watch?v=i-NjXXnTv70\">▶ Watch the demonstration</a> gRouvr booting Linux and QSOE/N on the SpacemiT K3. Opens on YouTube.</figcaption></figure>\n<h3>Built to outlast</h3>\n<h3>Not tied to one chip</h3>\n<p>The first RVA23 SoCs come from Chinese vendors; more will follow from other vendors and other regions. The reference stack depends on the RVA23 profile and on open interfaces, not on a particular SoC. Moving a box to another RVA23 chip means porting the firmware, adapting the hypervisor and the board's drivers. The real-time application and the operator's Linux move with it.</p>\n<h3>Not tied to one developer</h3>\n<p>The reference stack is open source: HFI BIOS under GPL-2.0, like the U-Boot it is based on; mr-bml under GPL-3.0; gRouvr and QSOE under Apache 2.0. Anyone can build, audit and maintain it, with or without its original developers. A machine that runs for 15 years needs software that can be maintained for 15 years.</p>\n<p>Join</p>\n<h2>Build the RISC-V industrial computer with us</h2>\n<p>ERICI is in its founding phase. Companies and institutions that see RVA23 as the future of industrial computing are welcome to join now and shape the initiative from the start.</p>\n<h3>Who we invite, and what they bring</h3>\n<ul>\n<li><strong>Industrial hardware makers</strong> the box itself: an RVA23 board in a real enclosure, with I/O and a datasheet</li>\n<li><strong>Silicon vendors</strong> RVA23 SoCs with an IOMMU and long-term availability</li>\n<li><strong>Machine builders and plant operators</strong> requirements from the field, and a first machine to put a box in</li>\n<li><strong>OS and driver vendors</strong> your RTOS, Linux distribution or drivers, brought up on a named RVA23 box</li>\n<li><strong>Universities and research</strong> teaching and theses on real ERICI systems</li>\n</ul>\n<h3>How ERICI works</h3>\n<ul>\n<li><strong>Non-commercial.</strong> ERICI sells nothing and charges no membership fees.</li>\n<li><strong>Open interfaces.</strong> How each layer hands over to the next is public: UEFI, kernel + initrd, devicetree. Closed-source components are welcome, as long as they keep to these interfaces.</li>\n<li><strong>Bring a real system.</strong> Contributions are RISC-V industrial computers: a named SoC in a real box, with a datasheet and a date. Software counts when it serves such a system, such as the driver that lets the real-time partition on box X run its machine.</li>\n<li><strong>Concrete, not abstract.</strong> No road maps without silicon, no specs without a system that boots them.</li>\n</ul>\n",
  "content_markdown": "European RISC-V Industrial Computing Initiative\n\nRISC-V Industrial Computers.\\\n Open, partitioned, built to last.\n---\n\nRVA23 silicon has arrived. The industrial computer built on it has not. ERICI coordinates a reference stack, from firmware to real-time and general-purpose operating systems: it fixes the interfaces between the layers and verifies that they boot together on real RVA23 hardware. A box that boots it is ERICI-compatible.\n\n- Non-commercial\n- RVA23\n- Based in Europe, open worldwide\n\n**Linux** operator GUI, HMI\n\n**QSOE** real-time control\n\n**gRouvr** partitioning hypervisor\n\n**mr-bml** boot loader, OS selection\n\n**HFI BIOS** firmware, Set-Up, boot control\n\n**RVA23 RISC-V SoC** cores, memory, devices, IOMMU\n\nThe ERICI reference stack, tested together layer by layer. [See how it boots](https://erici.eu/#stack)\n\nWhy now\n\n## Industrial computing is ready for RISC-V\n\nToday's industrial computers run on x86 and Arm: two instruction sets, each owned and licensed by a single company. RISC-V is open, governed by a non-profit, and implemented by many vendors. Until recently it lacked what industrial systems need. That has changed.\n\n1\n\n### An open ISA\n\nNo license for the instruction set, no single owner, no single country. A machine expected to run for 15 years should not depend on one company's roadmap, or one government's decisions.\n\n2\n\n### RVA23: a real baseline\n\nThe RVA23 profile, ratified in October 2024, makes the hypervisor and vector extensions mandatory. Software can rely on them on every compliant chip.\n\n3\n\n### Silicon is shipping\n\nThe first RVA23 SoCs and boards are available in 2026, with eight 64-bit cores and an IOMMU. Developers can buy them today.\n\n4\n\n### One box instead of two\n\nA partitioning hypervisor runs real-time control and the operator's Linux side by side, isolated from each other, on one SoC.\n\n### From a university project to industrial computing\n\n1. **2010** RISC-V starts at UC Berkeley\n2. **2015** RISC-V Foundation founded\n3. **2020** RISC-V International, based in Switzerland\n4. **2021** Hypervisor and vector extensions ratified\n5. **2024** RVA23 profile ratified\n6. **2026** First RVA23 boards. ERICI starts.\n\nSo why are there no RISC-V industrial computers yet? Board makers wait for software, software waits for boards, and customers wait for both. ERICI breaks that loop with an open reference stack running on real hardware.\n\nThe gap\n\n## The silicon is here. The industrial computer isn't yet.\n\nThe first RVA23 machines are on the market: eight 64-bit RISC-V cores, the hypervisor extension, an IOMMU. They are excellent development and edge platforms. An industrial computer has to do more: survive the control cabinet, talk to the field, and stay available for a decade or longer.\n\n![Firefly AIBOX-K3, a compact black and grey mini PC](https://erici.eu/img/01-FireFly_AIBOX_K3.png)\n\n### Firefly AIBOX-K3\n\nT-Chip Intelligent Technology · edge mini PC\n\n- SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23\n- Up to 32 GB LPDDR5, UFS, M.2 NVMe\n- 2× Gigabit Ethernet, 9–20 V DC input\n- −20 to 60 °C operating temperature\n\nImage © T-Chip Intelligent Technology Co., Ltd. · [product page](https://www.firefly.store/collections/ai-box/products/aibox-k3-risc-v-edge-mini-pc)\n\n![Milk-V Jupiter2 in its black metal case with two antennas](https://erici.eu/img/02-MilkV_Jupiter2.png)\n\n### Milk-V Jupiter2\n\nMilk-V · single-board computer, metal case\n\n- SpacemiT K3, 8× X100 RISC-V cores up to 2.4 GHz, RVA23\n- Up to 32 GB LPDDR5, UFS, M.2 NVMe\n- Gigabit and 10 GbE SFP+, Wi-Fi 6\n- Real-time I/O expansion for EtherCAT and CAN-FD modules\n\nImage © Milk-V · [product page](https://milkv.io/jupiter2)\n\n### What a RISC-V Industrial Computer needs\n\n| Requirement  | AIBOX-K3      | Jupiter2 |\n| ------------ | ------------- | -------- |\n| Yes          | Yes           |          |\n| 9–20 V       | 12 V / USB-PD |          |\n| −20 to 60 °C | Not stated    |          |\n| Not stated   | Via modules   |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not stated   | Not stated    |          |\n| Not yet      | Not yet       |          |\n\nPartitioned stack: demonstrated on the SpacemiT K3 PicoITX board, not yet on these products. [See the video](https://erici.eu/#demo).\\\n Specifications as published by the manufacturers, October 2026. Both products are shown as examples of RVA23 hardware available today. No affiliation with ERICI or endorsement by the manufacturers is implied.\n\nThe missing pieces are not the cores. They are the industrial hardware around them and an open, partitioned software stack on top. That is where ERICI starts.\n\nReference stack\n\n## Defined together, verified together\n\nA RISC-V Industrial Computer is built in layers. ERICI defines a reference stack, documents the interface between each pair of layers, and verifies the whole stack on real RVA23 hardware. The reference components are developed by QSOE Systems; Linux by its community. Each layer depends only on what the layer below hands over.\n\n**Operator partition** GUI, HMI, networking\n\n**Linux** a general-purpose OS for everything that is not time-critical\n\n- devicetree\n- kernel + initrd\n\n**Real-time partition** control loops, machine I/O\n\n**[QSOE](https://qsoe.net)** a QNX-style environment: /N on its own Skimmer microkernel, /L on seL4, same userspace\n\n- devicetree\n- kernel + initrd\n- [Multiboot3](https://gitlab.com/qsoe/mr-bml) for /L, next gRouvr\n\n**Partitioning** CPUs, memory, devices, IOMMU\n\n**gRouvr** RVA23 resource-partitioning hypervisor; every available means of isolation, IOMMU included\n\n- kernel + initrd, like Linux\n\n**Loading** boot menu, OS images\n\n**[mr-bml](https://gitlab.com/qsoe/mr-bml)** menu-driven boot loader: the operator selects which systems to start\n\n- UEFI application\n\n**Firmware** initialization, boot control\n\n**[HFI BIOS](https://qsoe.net/hfi)** U-Boot-based, with POST and a BIOS-style Set-Up for industrial boards\n\n- RVA23 profile\n\n**Hardware** RVA23 SoC with IOMMU\n\n**SpacemiT K3** 8× X100 cores, hypervisor extension, IOMMU\n\n- the silicon itself\n\n### How it boots\n\nThe firmware initializes the system, runs POST and offers its Set-Up. Then it starts a UEFI boot loader, and its job is done. The loader starts operating systems, or a hypervisor together with them.\n\ngRouvr is loaded just like a Linux kernel with its initrd. Its boot package is a CPIO archive that holds the kernel and initramfs image of every partition. So mr-bml loads it, and so does GRUB. gRouvr then gives each partition its own CPUs, memory and devices, and a devicetree that describes them. Real-time and Linux partitions start side by side.\n\n[![QSOE/N login prompt on a monitor, running as a gRouvr guest on the SpacemiT K3](https://erici.eu/img/03-demo-grouvr-k3.jpg)](https://www.youtube.com/watch?v=i-NjXXnTv70) \\\n [▶ Watch the demonstration](https://www.youtube.com/watch?v=i-NjXXnTv70) gRouvr booting Linux and QSOE/N on the SpacemiT K3. Opens on YouTube.\n\n### Built to outlast\n\n### Not tied to one chip\n\nThe first RVA23 SoCs come from Chinese vendors; more will follow from other vendors and other regions. The reference stack depends on the RVA23 profile and on open interfaces, not on a particular SoC. Moving a box to another RVA23 chip means porting the firmware, adapting the hypervisor and the board's drivers. The real-time application and the operator's Linux move with it.\n\n### Not tied to one developer\n\nThe reference stack is open source: HFI BIOS under GPL-2.0, like the U-Boot it is based on; mr-bml under GPL-3.0; gRouvr and QSOE under Apache 2.0. Anyone can build, audit and maintain it, with or without its original developers. A machine that runs for 15 years needs software that can be maintained for 15 years.\n\nJoin\n\n## Build the RISC-V industrial computer with us\n\nERICI is in its founding phase. Companies and institutions that see RVA23 as the future of industrial computing are welcome to join now and shape the initiative from the start.\n\n### Who we invite, and what they bring\n\n- **Industrial hardware makers** the box itself: an RVA23 board in a real enclosure, with I/O and a datasheet\n- **Silicon vendors** RVA23 SoCs with an IOMMU and long-term availability\n- **Machine builders and plant operators** requirements from the field, and a first machine to put a box in\n- **OS and driver vendors** your RTOS, Linux distribution or drivers, brought up on a named RVA23 box\n- **Universities and research** teaching and theses on real ERICI systems\n\n### How ERICI works\n\n- **Non-commercial.** ERICI sells nothing and charges no membership fees.\n- **Open interfaces.** How each layer hands over to the next is public: UEFI, kernel + initrd, devicetree. Closed-source components are welcome, as long as they keep to these interfaces.\n- **Bring a real system.** Contributions are RISC-V industrial computers: a named SoC in a real box, with a datasheet and a date. Software counts when it serves such a system, such as the driver that lets the real-time partition on box X run its machine.\n- **Concrete, not abstract.** No road maps without silicon, no specs without a system that boots them.\n",
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